The present invention relates to a method of fabricating a flash memory device and, more particularly, to a method of fabricating a flash memory device that can improve an interference phenomenon between neighboring word lines and prevent abnormal oxidization of a conductive layer for a control gate.
A flash memory device is a memory device that can retain its data when power is off. This flash memory device is equipped with a charge trap layer in which charges are trapped in order to cause a threshold voltage (Vth) difference between the gate and the channel. The threshold voltage (Vth) is varied depending on a state (a program state or an erase state in which electrons are discharged) in which charges are injected into the charge trap layer. Thus, a gate voltage (Vg) for turning on the channel is varied. The operation of the flash memory device is implemented based on the concept that the threshold voltage (Vth) is changed depending on charges trapped or stored in the charge trap layer.
Recently, as a high speed of a device is required in line with higher integration of the device, a control gate is formed using a tungsten (W) layer with a low resistivity. Formation of the control gate using the tungsten layer causes abnormal oxidization of the tungsten layer during a subsequent annealing process. The abnormal oxidization is caused by a reaction between the tungsten (W) in the tungsten layer and the oxygen in an oxide layer of the spacer. Such abnormal oxidization of the tungsten layer becomes a significant problem in securing the reliability of a device after the process is finished.
Further, as devices are more highly integrated, the width of isolation layers is narrowed and a distance between neighboring word lines and between neighboring floating gates is reduced. An interference capacitor in the word line direction, the bit line direction, and the like causes an interference that deepens the shift of the cell threshold voltage, making normal cell operation difficult. An insulating layer between floating gates is generally formed of an oxide layer having a dielectric constant of 4.2. However, it is difficult to lower the capacitance value in order to form spacers. Using a material having a low dielectric constant instead of the oxide layer does not solve the fundamental problem and is difficult to implement.